CS302 GDB Discussion and Solution Ideas Spring Fall 2014 Due Date 13th August 2014

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[COLOR="red"]CS302 GDB Discussion and Solution Ideas Spring Fall 2014 Due Date 13th August 2014
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The topic of Graded Discussion Board:

There are three edge-triggered flip-flops namely SR, D and J-K that are used in digital logic circuits and every flip-flop has its own operation. Which flip flop will be better in performance against each factor given below?


Power consumption
Delay (in terms of output)
Give solid arguments to validate your view.
You may give another type of Flip Flop if any, that you think is better.


A concise, coherent and to the point comment is preferred over lengthy comment having irrelevant details, unnecessary/lengthy comments will have negative impact. Your comment must not be more than 5-7 lines. Comments, posted on regular Lesson's MDB or sent through email will not be considered in any case. Any request about such an acceptance will not be catered.