Advance Computer Architectuer CS501 FALL 2010 second assignment solution

[Xpert]

[FONT=&quot]What will be the logic levels on the external SRC buses when each of the given SRC instruction is executing on the processor? Complete Table: A all numbers are in the decimal number system, unless noted otherwise. (Assume the required missing information if necessary). Also Specify memory addressing modes for each of the SRC instructions given in Table.[/FONT]
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[FONT=&quot]SRC instruction[/FONT]
[FONT=&quot]RTL Equivalent[/FONT]
[FONT=&quot]Address Bus<31….0>[/FONT]
[FONT=&quot]Data Bus[/FONT]
[FONT=&quot]<31….0>[/FONT]
[FONT=&quot]MRead[/FONT]
[FONT=&quot]MWrite[/FONT]
[FONT=&quot]Addressing mode[/FONT][FONT=&quot][/FONT]
[FONT=&quot]Ld r9,4(r2)[/FONT]
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[FONT=&quot]Ld r4,4[/FONT]
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[FONT=&quot]Ld r3, M[r3][/FONT]
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[FONT=&quot]Move r3, r2[/FONT]
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[FONT=&quot]Table: A[/FONT]

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[FONT=&quot]Assumptions:[/FONT]
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• [FONT=&quot]All memory content is aligned properly. [/FONT]
  
• [FONT=&quot]In other words, all the memory accesses start at addresses divisible by 4. [/FONT]
  
• [FONT=&quot]Value in the PC = 000DC348h[/FONT]
  

[FONT=&quot]Memory map with assumed values[/FONT]

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[FONT=&quot]Register map with assumed values[/FONT]